Closed loop dynamic capacitance measurement

ABSTRACT

This disclosure provides systems, methods and apparatus for measuring capacitance of a display unit, such as an interferometric modulator (IMOD). In one example, a circuit may include an operational amplifier (op-amp), a voltage controlled current source, and feedback from an output of the op-amp as an input to the voltage controlled current source. An output of the voltage controlled current source may be provided to a display unit as well as an input of the op-amp. A second input of the op-amp may be provided a ramping reference voltage.

PRIORITY DATA

This patent document claims priority to co-pending and commonly assignedU.S. Provisional Patent Application No. 61/893,808, titled “Closed LoopDynamic Capacitance Measurement”, by Van Lier et al., filed on Oct. 21,2013, which is hereby incorporated by reference in its entirety and forall purposes.

TECHNICAL FIELD

This disclosure relates to electromechanical systems and devices. Morespecifically, the disclosure relates to determining a capacitanceassociated with an electromechanical system device, such as aninterferometric modulator (IMOD).

DESCRIPTION OF THE RELATED TECHNOLOGY

Electromechanical systems (EMS) include devices having electrical andmechanical elements, actuators, transducers, sensors, optical componentssuch as mirrors and optical films, and electronics. EMS devices orelements can be manufactured at a variety of scales including, but notlimited to, microscales and nanoscales. For example,microelectromechanical systems (MEMS) devices can include structureshaving sizes ranging from about a micron to hundreds of microns or more.Nanoelectromechanical systems (NEMS) devices can include structureshaving sizes smaller than a micron including, for example, sizes smallerthan several hundred nanometers. Electromechanical elements may becreated using deposition, etching, lithography, and/or othermicromachining processes that etch away parts of substrates and/ordeposited material layers, or that add layers to form electrical andelectromechanical devices.

One type of EMS device is called an interferometric modulator (IMOD).The term IMOD or interferometric light modulator refers to a device thatselectively absorbs and/or reflects light using the principles ofoptical interference. In some implementations, an IMOD display elementmay include a pair of conductive plates, one or both of which may betransparent and/or reflective, wholly or in part, and capable ofrelative motion upon application of an appropriate electrical signal.For example, one plate may include a stationary layer deposited over, onor supported by a substrate and the other plate may include a reflectivemembrane separated from the stationary layer by an air gap. The positionof one plate in relation to another can change the optical interferenceof light incident on the IMOD display element. IMOD-based displaydevices have a wide range of applications, and are anticipated to beused in improving existing products and creating new products,especially those with display capabilities.

In some implementations, a movable element of the IMOD may be moved to aparticular position from a starting point and under a particularapplication of voltages to electrodes of the IMOD. However, the movableelement of another IMOD may move to a slightly different position fromthe same starting point and under the same application of voltages. Themovable elements may include a mirror which reflects light at awavelength based on the position of the movable element. Accordingly,the IMODs may reflect light at different wavelengths because the movableelements may be at slightly different positions.

SUMMARY

The systems, methods and devices of this disclosure each have severalinnovative aspects, no single one of which is solely responsible for thedesirable attributes disclosed herein.

One innovative aspect of the subject matter described in this disclosurecan be implemented in a circuit including an amplifier having a firstinput, a second input, and an output, the first input of the amplifiercoupled with a voltage reference source; a current source having aninput and an output, the input of the current source coupled with theoutput of the amplifier, the output of the current source coupled withthe second input of the amplifier, the current source being voltagecontrolled; and one or more display units having a first terminalcoupled with the second input of the amplifier and with the output ofthe current source, wherein the current source provides a current basedon a voltage associated with the output of the amplifier, the currentincreasing until a voltage associated with the first terminal of the oneor more display units equals a voltage associated with the voltagereference source.

In some implementations, the circuit can include a feedback capacitorhaving a first terminal and a second terminal, the first terminal of thefeedback capacitor coupled with the output of the current source, thesecond terminal of the feedback capacitor coupled with the output of theamplifier.

In some implementations, a capacitance of the feedback capacitor is lessthan or equal to a capacitance of the one or more display units.

In some implementations, the circuit can include an analog-to-digitalconverter having an input coupled with the output of the amplifier.

In some implementations, the one or more display units have a secondterminal set to a first fixed voltage.

In some implementations, the one or more display units have a thirdterminal set to the first fixed voltage.

In some implementations, the one or more display units have a thirdterminal set to a second fixed voltage.

In some implementations, the first terminal of the display unit isassociated with a movable element.

In some implementations, the voltage reference source ramps through avoltage range associated with a travel range of the movable element.

In some implementations, the travel range of the movable element isbetween a second terminal and a third terminal of the display unit.

In some implementations, the current source has a linear gain.

In some implementations, a movable element associated with the firstterminal of the one or more display units is configured to move topositions between a second terminal and a third terminal of the one ormore display units until the voltage associated with the first terminalof the display units equals the voltage associated with the voltagereference source.

Another innovative aspect of the subject matter described in thisdisclosure can be implemented in a system having a measurement circuitincluding an amplifier having a first input, a second input, and anoutput, the first input of the amplifier coupled with a voltagereference source, and a current source having an input and an output,the input of the current source coupled with the output of theamplifier, the output of the current source coupled with the secondinput of the amplifier, the current source being voltage controlled; oneor more display units having a first terminal coupled with the secondinput of the amplifier and with the output of the current source,wherein the current source provides a current based on a voltageassociated with the output of the amplifier, the current increasinguntil a voltage associated with the first terminal of the one or moredisplay units equals a voltage associated with the voltage referencesource; an analog-to-digital converter (ADC) having an input coupledwith the output of the amplifier, and an output to provide measurementdata; and a memory configured to store the measurement data.

In some implementations, a microcontroller can be configured to analyzethe measurement data.

Another innovative aspect of the subject matter described in thisdisclosure can be implemented in a method for determining capacitance ofa group of one or more display units. A reference voltage can be ramped.The reference voltage can be associated with a first input of anamplifier, the amplifier having a second input, and an output. A currentsource can generate a current. The current source can have an input andan output, the input of the current source coupled with the output ofthe amplifier, the output of the current source coupled with the secondinput of the amplifier, the current source being voltage controlled. Avoltage associated with a first terminal of the group of one or moredisplay units can be provided. The first terminal can be coupled withthe second input of the amplifier and with the output of the currentsource, wherein the current source provides a current based on a voltageassociated with the output of the amplifier, the current increasinguntil the voltage associated with the first terminal of the one or moredisplay units equals a voltage associated with the voltage referencesource.

In some implementations, a feedback capacitor has a first terminalcoupled with the output of the current source and a second terminalcoupled with the output of the amplifier.

In some implementations, a capacitance of the feedback capacitor can bechanged based on a number of display units in the group of the one ormore display units.

Details of one or more implementations of the subject matter describedin this disclosure are set forth in the accompanying drawings and thedescription below. Although the examples provided in this disclosure areprimarily described in terms of EMS and MEMS-based displays the conceptsprovided herein may apply to other types of displays such as liquidcrystal displays, organic light-emitting diode (“OLED”) displays, andfield emission displays. Other features, aspects, and advantages willbecome apparent from the description, the drawings and the claims. Notethat the relative dimensions of the following figures may not be drawnto scale.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is an isometric view illustration depicting two adjacentinterferometric modulator (IMOD) display elements in a series or arrayof display elements of an IMOD display device.

FIG. 2 is a system block diagram illustrating an electronic deviceincorporating an IMOD-based display including a three element by threeelement array of IMOD display elements.

FIG. 3 is a graph illustrating movable reflective layer position versusapplied voltage for an IMOD display element.

FIG. 4 is a table illustrating various states of an IMOD display elementwhen various common and segment voltages are applied.

FIG. 5A is an illustration of a frame of display data in a three elementby three element array of IMOD display elements displaying an image.

FIG. 5B is a timing diagram for common and segment signals that may beused to write data to the display elements illustrated in FIG. 5A.

FIGS. 6A and 6B are schematic exploded partial perspective views of aportion of an electromechanical systems (EMS) package including an arrayof EMS elements and a backplate.

FIG. 7 is an example of a system block diagram illustrating anelectronic device incorporating an IMOD-based display.

FIG. 8 is a circuit schematic of an example of a three terminal IMOD.

FIGS. 9A, 9B, and 9C are examples of a movable element in differentpositions.

FIG. 9D is an example of an illustration of capacitances in an IMOD.

FIG. 10A is a circuit schematic illustrating an example of a closed loopmeasurement circuit.

FIG. 10B is a circuit schematic illustrating an example of a threeterminal IMOD coupled with the closed loop measurement circuit of FIG.10A.

FIG. 11A is an illustration of an example of current vs. voltageassociated with IMODs.

FIG. 11B is an illustration of an example of capacitance vs. voltageassociated with IMODs.

FIG. 12 is an example of a system block diagram of a systemincorporating the measurement circuit of FIG. 10A.

FIG. 13 illustrates an example of a six-by-six display array.

FIG. 14 is a flow diagram illustrating a method for measuringcapacitance.

FIG. 15 is an example of a system block diagram using the measurementcircuit of FIG. 10A to measure leakage.

FIG. 16 is a flow diagram illustrating a method for measuring leakage.

FIGS. 17A and 17B are system block diagrams illustrating a displaydevice that includes a plurality of IMOD display elements.

Like reference numbers and designations in the various drawings indicatelike elements.

DETAILED DESCRIPTION

The following description is directed to certain implementations for thepurposes of describing the innovative aspects of this disclosure.However, a person having ordinary skill in the art will readilyrecognize that the teachings herein can be applied in a multitude ofdifferent ways. The described implementations may be implemented in anydevice, apparatus, or system that can be configured to display an image,whether in motion (such as video) or stationary (such as still images),and whether textual, graphical or pictorial. More particularly, it iscontemplated that the described implementations may be included in orassociated with a variety of electronic devices such as, but not limitedto: mobile telephones, multimedia Internet enabled cellular telephones,mobile television receivers, wireless devices, smartphones, Bluetooth®devices, personal data assistants (PDAs), wireless electronic mailreceivers, hand-held or portable computers, netbooks, notebooks,smartbooks, tablets, printers, copiers, scanners, facsimile devices,global positioning system (GPS) receivers/navigators, cameras, digitalmedia players (such as MP3 players), camcorders, game consoles, wristwatches, clocks, calculators, television monitors, flat panel displays,electronic reading devices (e.g., e-readers), computer monitors, autodisplays (including odometer and speedometer displays, etc.), cockpitcontrols and/or displays, camera view displays (such as the display of arear view camera in a vehicle), electronic photographs, electronicbillboards or signs, projectors, architectural structures, microwaves,refrigerators, stereo systems, cassette recorders or players, DVDplayers, CD players, VCRs, radios, portable memory chips, washers,dryers, washer/dryers, parking meters, packaging (such as inelectromechanical systems (EMS) applications includingmicroelectromechanical systems (MEMS) applications, as well as non-EMSapplications), aesthetic structures (such as display of images on apiece of jewelry or clothing) and a variety of EMS devices. Theteachings herein also can be used in non-display applications such as,but not limited to, electronic switching devices, radio frequencyfilters, sensors, accelerometers, gyroscopes, motion-sensing devices,magnetometers, inertial components for consumer electronics, parts ofconsumer electronics products, varactors, liquid crystal devices,electrophoretic devices, drive schemes, manufacturing processes andelectronic test equipment. Thus, the teachings are not intended to belimited to the implementations depicted solely in the Figures, butinstead have wide applicability as will be readily apparent to onehaving ordinary skill in the art.

Interferometric modulator (IMOD) displays may include a movable elementwith a mirror that can be positioned at various points in order toreflect light at specific wavelengths. In some implementations, themovable element of the IMOD may be moved to a particular position from astarting point and under a particular application of voltages toelectrodes of the IMOD. However, the movable element of another IMOD maymove to a slightly different position from the same starting point andunder the same application of voltages. Some implementations of thesubject matter described herein include a closed loop dynamiccapacitance measurement circuit to determine a capacitance associatedwith the IMOD that may provide an indication as to the position of themovable element. Accordingly, an offset to be applied to the voltagesneeded to move the IMODs to the same position can be determined. In someimplementations, the closed loop dynamic capacitance measurement circuitmay include an operational amplifier (op-amp) with an output coupled toan input of a voltage controlled current source. The voltage controlledcurrent source may provide a current, based on the voltage provided bythe output of the op-amp, to charge one or more IMODs. The output of thevoltage controlled current source may also be coupled with an input ofthe op-amp. A ramping voltage may be provided as a second input of theop-amp. The output of the op-amp may also be coupled with ananalog-to-digital converter.

Particular implementations of the subject matter described in thisdisclosure can be implemented to realize one or more of the followingpotential advantages. The closed loop dynamic capacitance measurementcircuit may provide an indication that the movable element of the IMODmay move to an incorrect position, and therefore, reflect light at anunexpected wavelength. If an IMOD is indicated as deviating from itsexpected performance, an offset may be provided to the voltages appliedto the IMOD such that the movable element may be moved to an expectedposition, and therefore, reflect light at an expected wavelength. Theclosed loop dynamic capacitance measurement circuit may also have a lowsignal-to-noise ratio to measure small changes in capacitance. Moreover,measurements may be obtained by coupling a single terminal of athree-terminal IMOD to the closed loop dynamic capacitance measurementcircuit.

An example of a suitable EMS or MEMS device or apparatus, to which thedescribed implementations may apply, is a reflective display device.Reflective display devices can incorporate interferometric modulator(IMOD) display elements that can be implemented to selectively absorband/or reflect light incident thereon using principles of opticalinterference. IMOD display elements can include a partial opticalabsorber, a reflector that is movable with respect to the absorber, andan optical resonant cavity defined between the absorber and thereflector. In some implementations, the reflector can be moved to two ormore different positions, which can change the size of the opticalresonant cavity and thereby affect the reflectance of the IMOD. Thereflectance spectra of IMOD display elements can create fairly broadspectral bands that can be shifted across the visible wavelengths togenerate different colors. The position of the spectral band can beadjusted by changing the thickness of the optical resonant cavity. Oneway of changing the optical resonant cavity is by changing the positionof the reflector with respect to the absorber.

FIG. 1 is an isometric view illustration depicting two adjacentinterferometric modulator (IMOD) display elements in a series or arrayof display elements of an IMOD display device. The IMOD display deviceincludes one or more interferometric EMS, such as MEMS, displayelements. In these devices, the interferometric MEMS display elementscan be configured in either a bright or dark state. In the bright(“relaxed,” “open” or “on,” etc.) state, the display element reflects alarge portion of incident visible light. Conversely, in the dark(“actuated,” “closed” or “off,” etc.) state, the display elementreflects little incident visible light. MEMS display elements can beconfigured to reflect predominantly at particular wavelengths of lightallowing for a color display in addition to black and white. In someimplementations, by using multiple display elements, differentintensities of color primaries and shades of gray can be achieved.

The IMOD display device can include an array of IMOD display elementswhich may be arranged in rows and columns. Each display element in thearray can include at least a pair of reflective and semi-reflectivelayers, such as a movable reflective layer (i.e., a movable layer, alsoreferred to as a mechanical layer) and a fixed partially reflectivelayer (i.e., a stationary layer), positioned at a variable andcontrollable distance from each other to form an air gap (also referredto as an optical gap, cavity or optical resonant cavity). The movablereflective layer may be moved between at least two positions. Forexample, in a first position, i.e., a relaxed position, the movablereflective layer can be positioned at a distance from the fixedpartially reflective layer. In a second position, i.e., an actuatedposition, the movable reflective layer can be positioned more closely tothe partially reflective layer. Incident light that reflects from thetwo layers can interfere constructively and/or destructively dependingon the position of the movable reflective layer and the wavelength(s) ofthe incident light, producing either an overall reflective ornon-reflective state for each display element. In some implementations,the display element may be in a reflective state when unactuated,reflecting light within the visible spectrum, and may be in a dark statewhen actuated, absorbing and/or destructively interfering light withinthe visible range. In some other implementations, however, an IMODdisplay element may be in a dark state when unactuated, and in areflective state when actuated. In some implementations, theintroduction of an applied voltage can drive the display elements tochange states. In some other implementations, an applied charge candrive the display elements to change states.

The depicted portion of the array in FIG. 1 includes two adjacentinterferometric MEMS display elements in the form of IMOD displayelements 12. In the display element 12 on the right (as illustrated),the movable reflective layer 14 is illustrated in an actuated positionnear, adjacent or touching the optical stack 16. The voltage V_(bias)applied across the display element 12 on the right is sufficient to moveand also maintain the movable reflective layer 14 in the actuatedposition. In the display element 12 on the left (as illustrated), amovable reflective layer 14 is illustrated in a relaxed position at adistance (which may be predetermined based on design parameters) from anoptical stack 16, which includes a partially reflective layer. Thevoltage V₀ applied across the display element 12 on the left isinsufficient to cause actuation of the movable reflective layer 14 to anactuated position such as that of the display element 12 on the right.

In FIG. 1, the reflective properties of IMOD display elements 12 aregenerally illustrated with arrows indicating light 13 incident upon theIMOD display elements 12, and light 15 reflecting from the displayelement 12 on the left. Most of the light 13 incident upon the displayelements 12 may be transmitted through the transparent substrate 20,toward the optical stack 16. A portion of the light incident upon theoptical stack 16 may be transmitted through the partially reflectivelayer of the optical stack 16, and a portion will be reflected backthrough the transparent substrate 20. The portion of light 13 that istransmitted through the optical stack 16 may be reflected from themovable reflective layer 14, back toward (and through) the transparentsubstrate 20. Interference (constructive and/or destructive) between thelight reflected from the partially reflective layer of the optical stack16 and the light reflected from the movable reflective layer 14 willdetermine in part the intensity of wavelength(s) of light 15 reflectedfrom the display element 12 on the viewing or substrate side of thedevice. In some implementations, the transparent substrate 20 can be aglass substrate (sometimes referred to as a glass plate or panel). Theglass substrate may be or include, for example, a borosilicate glass, asoda lime glass, quartz, Pyrex, or other suitable glass material. Insome implementations, the glass substrate may have a thickness of 0.3,0.5 or 0.7 millimeters, although in some implementations the glasssubstrate can be thicker (such as tens of millimeters) or thinner (suchas less than 0.3 millimeters). In some implementations, a non-glasssubstrate can be used, such as a polycarbonate, acrylic, polyethyleneterephthalate (PET) or polyether ether ketone (PEEK) substrate. In suchan implementation, the non-glass substrate will likely have a thicknessof less than 0.7 millimeters, although the substrate may be thickerdepending on the design considerations. In some implementations, anon-transparent substrate, such as a metal foil or stainless steel-basedsubstrate can be used. For example, a reverse-IMOD-based display, whichincludes a fixed reflective layer and a movable layer which is partiallytransmissive and partially reflective, may be configured to be viewedfrom the opposite side of a substrate as the display elements 12 of FIG.1 and may be supported by a non-transparent substrate.

The optical stack 16 can include a single layer or several layers. Thelayer(s) can include one or more of an electrode layer, a partiallyreflective and partially transmissive layer, and a transparentdielectric layer. In some implementations, the optical stack 16 iselectrically conductive, partially transparent and partially reflective,and may be fabricated, for example, by depositing one or more of theabove layers onto a transparent substrate 20. The electrode layer can beformed from a variety of materials, such as various metals, for exampleindium tin oxide (ITO). The partially reflective layer can be formedfrom a variety of materials that are partially reflective, such asvarious metals (e.g., chromium and/or molybdenum), semiconductors, anddielectrics. The partially reflective layer can be formed of one or morelayers of materials, and each of the layers can be formed of a singlematerial or a combination of materials. In some implementations, certainportions of the optical stack 16 can include a single semi-transparentthickness of metal or semiconductor which serves as both a partialoptical absorber and electrical conductor, while different, electricallymore conductive layers or portions (e.g., of the optical stack 16 or ofother structures of the display element) can serve to bus signalsbetween IMOD display elements. The optical stack 16 also can include oneor more insulating or dielectric layers covering one or more conductivelayers or an electrically conductive/partially absorptive layer.

In some implementations, at least some of the layer(s) of the opticalstack 16 can be patterned into parallel strips, and may form rowelectrodes in a display device as described further below. As will beunderstood by one having ordinary skill in the art, the term “patterned”is used herein to refer to masking as well as etching processes. In someimplementations, a highly conductive and reflective material, such asaluminum (Al), may be used for the movable reflective layer 14, andthese strips may form column electrodes in a display device. The movablereflective layer 14 may be formed as a series of parallel strips of adeposited metal layer or layers (orthogonal to the row electrodes of theoptical stack 16) to form columns deposited on top of supports, such asthe illustrated posts 18, and an intervening sacrificial materiallocated between the posts 18. When the sacrificial material is etchedaway, a defined gap 19, or optical cavity, can be formed between themovable reflective layer 14 and the optical stack 16. In someimplementations, the spacing between posts 18 may be approximately1-1000 μm, while the gap 19 may be approximately less than 10,000Angstroms (Å).

In some implementations, each IMOD display element, whether in theactuated or relaxed state, can be considered as a capacitor formed bythe fixed and moving reflective layers. When no voltage is applied, themovable reflective layer 14 remains in a mechanically relaxed state, asillustrated by the display element 12 on the left in FIG. 1, with thegap 19 between the movable reflective layer 14 and optical stack 16.However, when a potential difference, i.e., a voltage, is applied to atleast one of a selected row and column, the capacitor formed at theintersection of the row and column electrodes at the correspondingdisplay element becomes charged, and electrostatic forces pull theelectrodes together. If the applied voltage exceeds a threshold, themovable reflective layer 14 can deform and move near or against theoptical stack 16. A dielectric layer (not shown) within the opticalstack 16 may prevent shorting and control the separation distancebetween the layers 14 and 16, as illustrated by the actuated displayelement 12 on the right in FIG. 1. The behavior can be the sameregardless of the polarity of the applied potential difference. Though aseries of display elements in an array may be referred to in someinstances as “rows” or “columns,” a person having ordinary skill in theart will readily understand that referring to one direction as a “row”and another as a “column” is arbitrary. Restated, in some orientations,the rows can be considered columns, and the columns considered to berows. In some implementations, the rows may be referred to as “common”lines and the columns may be referred to as “segment” lines, or viceversa. Furthermore, the display elements may be evenly arranged inorthogonal rows and columns (an “array”), or arranged in non-linearconfigurations, for example, having certain positional offsets withrespect to one another (a “mosaic”). The terms “array” and “mosaic” mayrefer to either configuration. Thus, although the display is referred toas including an “array” or “mosaic,” the elements themselves need not bearranged orthogonally to one another, or disposed in an evendistribution, in any instance, but may include arrangements havingasymmetric shapes and unevenly distributed elements.

FIG. 2 is a system block diagram illustrating an electronic deviceincorporating an IMOD-based display including a three element by threeelement array of IMOD display elements. The electronic device includes aprocessor 21 that may be configured to execute one or more softwaremodules. In addition to executing an operating system, the processor 21may be configured to execute one or more software applications,including a web browser, a telephone application, an email program, orany other software application.

The processor 21 can be configured to communicate with an array driver22. The array driver 22 can include a row driver circuit 24 and a columndriver circuit 26 that provide signals to, for example a display arrayor panel 30. The cross section of the IMOD display device illustrated inFIG. 1 is shown by the lines 1-1 in FIG. 2. Although FIG. 2 illustratesa 3×3 array of IMOD display elements for the sake of clarity, thedisplay array 30 may contain a very large number of IMOD displayelements, and may have a different number of IMOD display elements inrows than in columns, and vice versa.

FIG. 3 is a graph illustrating movable reflective layer position versusapplied voltage for an IMOD display element. For IMODs, the row/column(i.e., common/segment) write procedure may take advantage of ahysteresis property of the display elements as illustrated in FIG. 3. AnIMOD display element may use, in one example implementation, about a10-volt potential difference to cause the movable reflective layer, ormirror, to change from the relaxed state to the actuated state. When thevoltage is reduced from that value, the movable reflective layermaintains its state as the voltage drops back below, in this example, 10volts, however, the movable reflective layer does not relax completelyuntil the voltage drops below 2 volts. Thus, a range of voltage,approximately 3-7 volts, in the example of FIG. 3, exists where there isa window of applied voltage within which the element is stable in eitherthe relaxed or actuated state. This is referred to herein as the“hysteresis window” or “stability window.” For a display array 30 havingthe hysteresis characteristics of FIG. 3, the row/column write procedurecan be designed to address one or more rows at a time. Thus, in thisexample, during the addressing of a given row, display elements that areto be actuated in the addressed row can be exposed to a voltagedifference of about 10 volts, and display elements that are to berelaxed can be exposed to a voltage difference of near zero volts. Afteraddressing, the display elements can be exposed to a steady state orbias voltage difference of approximately 5 volts in this example, suchthat they remain in the previously strobed, or written, state. In thisexample, after being addressed, each display element sees a potentialdifference within the “stability window” of about 3-7 volts. Thishysteresis property feature enables the IMOD display element design toremain stable in either an actuated or relaxed pre-existing state underthe same applied voltage conditions. Since each IMOD display element,whether in the actuated or relaxed state, can serve as a capacitorformed by the fixed and moving reflective layers, this stable state canbe held at a steady voltage within the hysteresis window withoutsubstantially consuming or losing power. Moreover, essentially little orno current flows into the display element if the applied voltagepotential remains substantially fixed.

In some implementations, a frame of an image may be created by applyingdata signals in the form of “segment” voltages along the set of columnelectrodes, in accordance with the desired change (if any) to the stateof the display elements in a given row. Each row of the array can beaddressed in turn, such that the frame is written one row at a time. Towrite the desired data to the display elements in a first row, segmentvoltages corresponding to the desired state of the display elements inthe first row can be applied on the column electrodes, and a first rowpulse in the form of a specific “common” voltage or signal can beapplied to the first row electrode. The set of segment voltages can thenbe changed to correspond to the desired change (if any) to the state ofthe display elements in the second row, and a second common voltage canbe applied to the second row electrode. In some implementations, thedisplay elements in the first row are unaffected by the change in thesegment voltages applied along the column electrodes, and remain in thestate they were set to during the first common voltage row pulse. Thisprocess may be repeated for the entire series of rows, or alternatively,columns, in a sequential fashion to produce the image frame. The framescan be refreshed and/or updated with new image data by continuallyrepeating this process at some desired number of frames per second.

The combination of segment and common signals applied across eachdisplay element (that is, the potential difference across each displayelement or pixel) determines the resulting state of each displayelement. FIG. 4 is a table illustrating various states of an IMODdisplay element when various common and segment voltages are applied. Aswill be readily understood by one having ordinary skill in the art, the“segment” voltages can be applied to either the column electrodes or therow electrodes, and the “common” voltages can be applied to the other ofthe column electrodes or the row electrodes.

As illustrated in FIG. 4, when a release voltage VC_(REL) is appliedalong a common line, all IMOD display elements along the common linewill be placed in a relaxed state, alternatively referred to as areleased or unactuated state, regardless of the voltage applied alongthe segment lines, i.e., high segment voltage VS_(H) and low segmentvoltage VS_(L). In particular, when the release voltage VC_(REL) isapplied along a common line, the potential voltage across the modulatordisplay elements or pixels (alternatively referred to as a displayelement or pixel voltage) can be within the relaxation window (see FIG.3, also referred to as a release window) both when the high segmentvoltage VS_(H) and the low segment voltage VS_(L) are applied along thecorresponding segment line for that display element.

When a hold voltage is applied on a common line, such as a high holdvoltage VC_(HOLD) _(_) _(H) or a low hold voltage VC_(HOLD) _(_) _(L),the state of the IMOD display element along that common line will remainconstant. For example, a relaxed IMOD display element will remain in arelaxed position, and an actuated IMOD display element will remain in anactuated position. The hold voltages can be selected such that thedisplay element voltage will remain within a stability window both whenthe high segment voltage VS_(H) and the low segment voltage VS_(L) areapplied along the corresponding segment line. Thus, the segment voltageswing in this example is the difference between the high VS_(H) and lowsegment voltage VS_(L), and is less than the width of either thepositive or the negative stability window.

When an addressing, or actuation, voltage is applied on a common line,such as a high addressing voltage VC_(ADD) _(_) _(H) or a low addressingvoltage VC_(ADD) _(_) _(L), data can be selectively written to themodulators along that common line by application of segment voltagesalong the respective segment lines. The segment voltages may be selectedsuch that actuation is dependent upon the segment voltage applied. Whenan addressing voltage is applied along a common line, application of onesegment voltage will result in a display element voltage within astability window, causing the display element to remain unactuated. Incontrast, application of the other segment voltage will result in adisplay element voltage beyond the stability window, resulting inactuation of the display element. The particular segment voltage whichcauses actuation can vary depending upon which addressing voltage isused. In some implementations, when the high addressing voltage VC_(ADD)_(_) _(H) is applied along the common line, application of the highsegment voltage VS_(H) can cause a modulator to remain in its currentposition, while application of the low segment voltage VS_(L) can causeactuation of the modulator. As a corollary, the effect of the segmentvoltages can be the opposite when a low addressing voltage VC_(ADD) _(_)_(L) is applied, with high segment voltage VS_(H) causing actuation ofthe modulator, and low segment voltage VS_(L) having substantially noeffect (i.e., remaining stable) on the state of the modulator.

In some implementations, hold voltages, address voltages, and segmentvoltages may be used which produce the same polarity potentialdifference across the modulators. In some other implementations, signalscan be used which alternate the polarity of the potential difference ofthe modulators from time to time. Alternation of the polarity across themodulators (that is, alternation of the polarity of write procedures)may reduce or inhibit charge accumulation that could occur afterrepeated write operations of a single polarity.

FIG. 5A is an illustration of a frame of display data in a three elementby three element array of IMOD display elements displaying an image.FIG. 5B is a timing diagram for common and segment signals that may beused to write data to the display elements illustrated in FIG. 5A. Theactuated IMOD display elements in FIG. 5A, shown by darkened checkeredpatterns, are in a dark-state, i.e., where a substantial portion of thereflected light is outside of the visible spectrum so as to result in adark appearance to, for example, a viewer. Each of the unactuated IMODdisplay elements reflect a color corresponding to their interferometriccavity gap heights. Prior to writing the frame illustrated in FIG. 5A,the display elements can be in any state, but the write procedureillustrated in the timing diagram of FIG. 5B presumes that eachmodulator has been released and resides in an unactuated state beforethe first line time 60 a.

During the first line time 60 a: a release voltage 70 is applied oncommon line 1; the voltage applied on common line 2 begins at a highhold voltage 72 and moves to a release voltage 70; and a low holdvoltage 76 is applied along common line 3. Thus, the modulators (common1, segment 1), (1,2) and (1,3) along common line 1 remain in a relaxed,or unactuated, state for the duration of the first line time 60 a, themodulators ( 2,1), (2,2) and (2,3) along common line 2 will move to arelaxed state, and the modulators (3,1), (3,2) and (3,3) along commonline 3 will remain in their previous state. In some implementations, thesegment voltages applied along segment lines 1,2 and 3 will have noeffect on the state of the IMOD display elements, as none of commonlines 1,2 or 3 are being exposed to voltage levels causing actuationduring line time 60 a (i.e., VC_(REL)-relax and VC_(HOLD) _(_)_(L)-stable).

During the second line time 60 b, the voltage on common line 1 moves toa high hold voltage 72, and all modulators along common line 1 remain ina relaxed state regardless of the segment voltage applied because noaddressing, or actuation, voltage was applied on the common line 1. Themodulators along common line 2 remain in a relaxed state due to theapplication of the release voltage 70, and the modulators (3,1), (3,2)and (3,3) along common line 3 will relax when the voltage along commonline 3 moves to a release voltage 70.

During the third line time 60 c, common line 1 is addressed by applyinga high address voltage 74 on common line 1. Because a low segmentvoltage 64 is applied along segment lines 1 and 2 during the applicationof this address voltage, the display element voltage across modulators(1,1) and (1,2) is greater than the high end of the positive stabilitywindow (i.e., the voltage differential exceeded a characteristicthreshold) of the modulators, and the modulators (1,1) and (1,2) areactuated. Conversely, because a high segment voltage 62 is applied alongsegment line 3, the display element voltage across modulator (1,3) isless than that of modulators (1,1) and (1,2), and remains within thepositive stability window of the modulator; modulator (1,3) thus remainsrelaxed. Also during line time 60 c, the voltage along common line 2decreases to a low hold voltage 76, and the voltage along common line 3remains at a release voltage 70, leaving the modulators along commonlines 2 and 3 in a relaxed position.

During the fourth line time 60 d, the voltage on common line 1 returnsto a high hold voltage 72, leaving the modulators along common line 1 intheir respective addressed states. The voltage on common line 2 isdecreased to a low address voltage 78. Because a high segment voltage 62is applied along segment line 2, the display element voltage acrossmodulator (2,2) is below the lower end of the negative stability windowof the modulator, causing the modulator (2,2) to actuate. Conversely,because a low segment voltage 64 is applied along segment lines 1 and 3,the modulators (2,1) and (2,3) remain in a relaxed position. The voltageon common line 3 increases to a high hold voltage 72, leaving themodulators along common line 3 in a relaxed state. Then, the voltage oncommon line 2 transitions back to the low hold voltage 76.

Finally, during the fifth line time 60 e, the voltage on common line 1remains at high hold voltage 72, and the voltage on common line 2remains at the low hold voltage 76, leaving the modulators along commonlines 1 and 2 in their respective addressed states. The voltage oncommon line 3 increases to a high address voltage 74 to address themodulators along common line 3. As a low segment voltage 64 is appliedon segment lines 2 and 3, the modulators (3,2) and (3,3) actuate, whilethe high segment voltage 62 applied along segment line 1 causesmodulator (3,1) to remain in a relaxed position. Thus, at the end of thefifth line time 60 e, the 3×3 display element array is in the stateshown in FIG. 5A, and will remain in that state as long as the holdvoltages are applied along the common lines, regardless of variations inthe segment voltage which may occur when modulators along other commonlines (not shown) are being addressed.

In the timing diagram of FIG. 5B, a given write procedure (i.e., linetimes 60 a-60 e) can include the use of either high hold and addressvoltages, or low hold and address voltages. Once the write procedure hasbeen completed for a given common line (and the common voltage is set tothe hold voltage having the same polarity as the actuation voltage), thedisplay element voltage remains within a given stability window, anddoes not pass through the relaxation window until a release voltage isapplied on that common line. Furthermore, as each modulator is releasedas part of the write procedure prior to addressing the modulator, theactuation time of a modulator, rather than the release time, maydetermine the line time. Specifically, in implementations in which therelease time of a modulator is greater than the actuation time, therelease voltage may be applied for longer than a single line time, asdepicted in FIG. 5A. In some other implementations, voltages appliedalong common lines or segment lines may vary to account for variationsin the actuation and release voltages of different modulators, such asmodulators of different colors.

FIGS. 6A and 6B are schematic exploded partial perspective views of aportion of an EMS package 91 including an array 36 of EMS elements and abackplate 92. FIG. 6A is shown with two corners of the backplate 92 cutaway to better illustrate certain portions of the backplate 92, whileFIG. 6B is shown without the corners cut away. The EMS array 36 caninclude a substrate 20, support posts 18, and a movable layer 14. Insome implementations, the EMS array 36 can include an array of IMODdisplay elements with one or more optical stack portions 16 on atransparent substrate, and the movable layer 14 can be implemented as amovable reflective layer.

The backplate 92 can be essentially planar or can have at least onecontoured surface (e.g., the backplate 92 can be formed with recessesand/or protrusions). The backplate 92 may be made of any suitablematerial, whether transparent or opaque, conductive or insulating.Suitable materials for the backplate 92 include, but are not limited to,glass, plastic, ceramics, polymers, laminates, metals, metal foils,Kovar and plated Kovar.

As shown in FIGS. 6A and 6B, the backplate 92 can include one or morebackplate components 94 a and 94 b, which can be partially or whollyembedded in the backplate 92. As can be seen in FIG. 6A, backplatecomponent 94 a is embedded in the backplate 92. As can be seen in FIGS.6A and 6B, backplate component 94 b is disposed within a recess 93formed in a surface of the backplate 92. In some implementations, thebackplate components 94 a and/or 94 b can protrude from a surface of thebackplate 92. Although backplate component 94 b is disposed on the sideof the backplate 92 facing the substrate 20, in other implementations,the backplate components can be disposed on the opposite side of thebackplate 92.

The backplate components 94 a and/or 94 b can include one or more activeor passive electrical components, such as transistors, capacitors,inductors, resistors, diodes, switches, and/or integrated circuits (ICs)such as a packaged, standard or discrete IC. Other examples of backplatecomponents that can be used in various implementations include antennas,batteries, and sensors such as electrical, touch, optical, or chemicalsensors, or thin-film deposited devices.

In some implementations, the backplate components 94 a and/or 94 b canbe in electrical communication with portions of the EMS array 36.Conductive structures such as traces, bumps, posts, or vias may beformed on one or both of the backplate 92 or the substrate 20 and maycontact one another or other conductive components to form electricalconnections between the EMS array 36 and the backplate components 94 aand/or 94 b. For example, FIG. 6B includes one or more conductive vias96 on the backplate 92 which can be aligned with electrical contacts 98extending upward from the movable layers 14 within the EMS array 36. Insome implementations, the backplate 92 also can include one or moreinsulating layers that electrically insulate the backplate components 94a and/or 94 b from other components of the EMS array 36. In someimplementations in which the backplate 92 is formed from vapor-permeablematerials, an interior surface of backplate 92 can be coated with avapor barrier (not shown).

The backplate components 94 a and 94 b can include one or moredesiccants which act to absorb any moisture that may enter the EMSpackage 91. In some implementations, a desiccant (or other moistureabsorbing materials, such as a getter) may be provided separately fromany other backplate components, for example as a sheet that is mountedto the backplate 92 (or in a recess formed therein) with adhesive.Alternatively, the desiccant may be integrated into the backplate 92. Insome other implementations, the desiccant may be applied directly orindirectly over other backplate components, for example byspray-coating, screen printing, or any other suitable method.

In some implementations, the EMS array 36 and/or the backplate 92 caninclude mechanical standoffs 97 to maintain a distance between thebackplate components and the display elements and thereby preventmechanical interference between those components. In the implementationillustrated in FIGS. 6A and 6B, the mechanical standoffs 97 are formedas posts protruding from the backplate 92 in alignment with the supportposts 18 of the EMS array 36. Alternatively or in addition, mechanicalstandoffs, such as rails or posts, can be provided along the edges ofthe EMS package 91.

Although not illustrated in FIGS. 6A and 6B, a seal can be providedwhich partially or completely encircles the EMS array 36. Together withthe backplate 92 and the substrate 20, the seal can form a protectivecavity enclosing the EMS array 36. The seal may be a semi-hermetic seal,such as a conventional epoxy-based adhesive. In some otherimplementations, the seal may be a hermetic seal, such as a thin filmmetal weld or a glass frit. In some other implementations, the seal mayinclude polyisobutylene (PIB), polyurethane, liquid spin-on glass,solder, polymers, plastics, or other materials. In some implementations,a reinforced sealant can be used to form mechanical standoffs.

In alternate implementations, a seal ring may include an extension ofeither one or both of the backplate 92 or the substrate 20. For example,the seal ring may include a mechanical extension (not shown) of thebackplate 92. In some implementations, the seal ring may include aseparate member, such as an O-ring or other annular member.

In some implementations, the EMS array 36 and the backplate 92 areseparately formed before being attached or coupled together. Forexample, the edge of the substrate 20 can be attached and sealed to theedge of the backplate 92 as discussed above. Alternatively, the EMSarray 36 and the backplate 92 can be formed and joined together as theEMS package 91. In some other implementations, the EMS package 91 can befabricated in any other suitable manner, such as by forming componentsof the backplate 92 over the EMS array 36 by deposition.

FIG. 7 is an example of a system block diagram illustrating anelectronic device incorporating an IMOD-based display. Moreover, FIG. 7depicts an implementation of row driver circuit 24 and column drivercircuit 26 of array driver 22 that provide signals to, for example,display array or panel 30, as previously discussed.

As an example, display module 710 in the fourth row may include switch720 and display unit 750. Display module 710 may be provided a rowsignal and a common signal from row driver circuit 24. Display module710 may also be provided a column signal from column driver circuit 26.The implementation of display module 710 may include a variety ofdifferent designs. In some implementations, display unit 750 may becoupled with switch 720, such as a transistor with its gate coupled tothe row signal and the column signal provided to the drain. Each displayunit 750 may include an IMOD display element as a pixel.

FIG. 8 is a circuit schematic of an example of a three terminal IMOD. Insome implementations, the circuit of FIG. 8 may include display unit 750(e.g., an IMOD) of FIG. 4. The circuit of FIG. 8 includes switch 720 ofFIG. 7 implemented as an n-type metal oxide semiconductor (NMOS)transistor M1 810. The gate of transistor M1 810 is coupled to V_(row)830, which may be provided by row driver circuit 24 of FIG. 7.Transistor M1 810 is also coupled to V_(column) 820, which may beprovided by column driver circuit 26 of FIG. 7. In particular, ifV_(row) 830 is biased to turn transistor M1 810 on, the voltage onV_(column) 820 may be applied to V_(d) electrode 860.

In an implementation, display unit 750 may be a three terminal IMODincluding three terminals or electrodes: V_(bias) electrode 855, V_(d)electrode 860, and V_(com) electrode 865. Display unit 750 may alsoinclude movable element 870 and dielectric 875. Movable element 870 mayinclude a mirror. Movable element 870 may be coupled with V_(d)electrode 860. Additionally, in some implementations, air gap 885 may bebetween V_(bias) electrode 855 and V_(d) electrode 860. Air gap 890 maybe between V_(d) electrode 860 and V_(com) electrode 865. In someimplementations, display unit 750 may also include one or morecapacitors. For example, one or more capacitors may be coupled betweenV_(d) electrode 860 and V_(com) electrode 865 or between V_(bias)electrode 855 and V_(d) electrode 860.

Movable element 870 may be positioned at various points between V_(bias)electrode 855 and V_(com) electrode 865 in order to reflect light at aspecific wavelength. In particular, applied voltage biases of V_(bias)electrode 855, V_(d) electrode 860, and V_(com) electrode 865 maydetermine the position of movable element 870. The position of movableelement 870 may also determine the size of air gaps 885 and 890.

Process variations, temperature gradients, and other effects can causethe performance of individual display units, such as IMODs, to differ.That is, the same application of voltages may allow movable element 870of two different IMODs to move to two slightly different positions froma consistent starting point. For example, FIGS. 9A, 9B, and 9C areexamples of movable element 870 in different positions. In FIG. 9A,movable element 870 is positioned in a reset position, for example,against dielectric 875 and towards V_(bias) electrode 855. Accordingly,air gap 885 is not available and air gap 890 is large. In FIG. 9B,movable element 870 is positioned at a different point between V_(bias)electrode 855 and V_(com) electrode 865. For example, the movableelement of FIG. 9B may be moved from the reset position shown in FIG.9A. In FIG. 9B, air gap 885 appears because movable element 870 ispositioned away from dielectric 875 and V_(bias) electrode 855 (i.e.,the reset position), for example, by an application of voltages to oneor more of V_(bias) electrode 855, V_(d) electrode 860, and V_(com)electrode 865. Moreover, the size of air gap 890 is smaller than thesize of air gap 890 in FIG. 9A.

However, another IMOD, under the same application of voltages and movingmovable element 870 from the same position (e.g., the reset position),may position movable element 870 to a slightly different position. InFIG. 9C, movable element 870 may be positioned from the reset positionof FIG. 9A. However, in FIG. 9C, movable element 870 is at a differentposition than movable element 870 in FIG. 9B. Movable element 870 inFIG. 9C is positioned Δd 960 away from the position of movable element870 in FIG. 9B. Additionally, the size of air gaps 885 and 890 differfrom air gaps 885 and 890 in FIG. 9B.

As such, both of the IMODs represented in FIGS. 9B and 9C reflect lightat different wavelengths. For example, the IMOD of FIG. 9B may be at anexpected position, but the IMOD of FIG. 9C is at an unexpected position,and therefore, reflecting light at an unexpected wavelength.

FIG. 9D is an example of an illustration of capacitances in an IMOD. InFIG. 9D, capacitance C1 950 may be the equivalent capacitance betweenV_(bias) electrode 855 and V_(d) electrode 860. For example, capacitanceC1 950 may be the equivalent series capacitance of air gap 885 anddielectric 875. Capacitance C2 960 may be the equivalent capacitancebetween V_(d) electrode 860 and V_(com) electrode 865. For example,capacitance C2 960 may be the equivalent series capacitance of air gap890 and movable element 870. Air gaps 885 and 890 may affect capacitancevalues of capacitance C1 950 and C2 960. Accordingly, as movable element870 is positioned, the sizes of air gaps 885 and 890 may change, andtherefore, change the values of capacitances C1 950 and C2 960.

FIG. 10A is a circuit schematic illustrating an example of a closed loopmeasurement circuit. Measurement circuit 1000 of FIG. 10A may be used toprovide measurements regarding capacitances of a display unit, such asan IMOD (e.g., capacitances C1 950 and C2 960), and therefore, providean indication as to the position of movable element 870.

In measurement circuit 1000 of FIG. 10A, an operational amplifier(op-amp) 1010 provides an output V_(in) 1060 that is an input to voltagecontrolled current source 1020. Voltage controlled current source 1020provides an output I_(out) 1040 as an input to op-amp 1010. Op-amp 1010may also include another input V_(ref) 1050. I_(out) 1040 may also beprovided to one or more display units, such as IMODs, modeled ascapacitor 1030, and feedback capacitor 1070. Feedback capacitor 1070 mayalso be coupled with V_(in) 1060. In some implementations, feedbackcapacitor 1070 may include multiple capacitors providing an equivalentcapacitance.

FIG. 10B is a circuit schematic illustrating an example of athree-terminal IMOD coupled with the closed loop measurement circuit ofFIG. 10A. As previously discussed, as the size of air gaps 885 and 890change (i.e., from positioning movable element 870), capacitance valuesof an IMOD may also change. In FIG. 10A, one or more IMODs may bemodeled as capacitor 1030, with the capacitance changing based on thesizes of air gaps 885 and/or 890. In some implementations, a terminal ofeach of the three-terminal IMODs may be coupled to a fixed voltage, suchas 0 V. A second terminal may be coupled with I_(out) 1040. Theterminals may be associated with V_(bias) electrode 855, V_(d) electrode860, and/or V_(com) electrode 865. Accordingly, capacitances C1 950(i.e., the capacitance between V_(bias) electrode 855 and V_(d)electrode 860) and C2 960 (i.e., the capacitance between V_(d) electrode860 and V_(com) electrode 865) may be measured. For example, If V_(d)electrode 860 is coupled with I_(out) 1040 and V_(com) electrode 865 isthe other terminal (e.g., grounded in FIG. 10A), then capacitor 1030 maymodel capacitance C2 960. Likewise, if V_(d) electrode 860 is coupledwith I_(out) 1040 and V_(bias) electrode 855 is the other terminal(e.g., grounded in FIG. 10A), then capacitor 1030 may model capacitanceC1 950. Capacitance C1 950 and C2 960 may also be measured in parallel.As an example, in configuration 1075 of FIG. 10B, both V_(bias)electrode 855 and V_(com) electrode 865 may be, for example, groundedand V_(d) electrode 860 may be coupled with I_(out) 1040. That is,V_(bias) electrode 855 and V_(com) electrode 865 may be coupled with thesame voltage source and applied the same voltage bias. As anotherexample, in configuration 1080 of FIG. 10B, V_(d) electrode 860 may becoupled with I_(out) 1040 and both V_(bias) electrode 855 and V_(com)electrode 865 may be biased to different voltages. In configuration1080, V_(com) 865 is coupled with ground and V_(bias) 855 is coupledwith another voltage source 1085. In FIG. 10B, the terminals of thethree-terminal IMOD may be coupled with voltage sources such that aterminal is not floating when measurements are being provided bymeasurement circuit 1000. However, in another implementation, aconfiguration may include a floating terminal (e.g., V_(bias) electrode855 or V_(com) electrode 865). In some scenarios, configuration 1080 mayprovide measurements that provide a better indication of the position ofmovable element 870. Configuration 1075 or the configuration with afloating electrode may provide better sensitivity (e.g., capacitancechanges may be a higher percentage of measured capacitance).

V_(ref) 1050 in FIG. 10A may provide a voltage ramping, for example,from 0 to 14 V as an input to op-amp 1010. The voltage range of 0 to 14V may be associated with moving movable element 870 throughout itsentire travel range. For example, if movable element 870 is in a resetposition (e.g., FIG. 9A), the voltage range of 0 to 14 V may providepositions for movable element 870 to move from the reset position to theend of its travel range, for example, against or towards V_(com)electrode 865.

Voltage controlled current source 1020 may be configured to provide aparticular gain, for example, 1 nanoampere (nA) per 1 millivolt (mV)(i.e., a linear gain). That is, for every 1 mV provided by op-amp 1010'soutput V_(in) 1060, voltage controlled current source 1020 may provide 1nA. In general, a voltage controlled current source with a sensitivegain may provide a low signal-to-noise ratio such that a small number ofdisplay units with a low capacitance change may be measured. In otherimplementations, voltage controlled current source 1020 may provide anon-linear gain. In some scenarios, providing a linear gain may alloweasier capacitance calculations from current measurements provided bymeasurement circuit 1000.

Accordingly, the output of op-amp 1010 (i.e., V_(in) 1060) provides adifferential input voltage between inputs V_(ref) 1050 and the voltageon the display units (e.g., V_(d) electrode 860 of an IMOD if it iscoupled with I_(out) 1040) modeled as capacitor 1030. Since V_(in) 1060is provided as a feedback to voltage controlled current source 1020, theoutput of voltage controlled current source 1020 (i.e., I_(out) 1040)will provide an increase in current until the voltage on the terminal ofthe IMODs coupled with I_(out) 1040 matches the voltage on V_(ref) 1050.That is, V_(in) 1060 may keep rising until T_(out) 1040 is high enoughto charge capacitor 1030 to a voltage matching V_(ref) 1050. As such,the IMOD's movable element 870 may move throughout its travel range asV_(ref) 1050 ramps up in voltage. Since movable element 870 is moving asV_(ref) 1050 ramps in voltage, the size of air gaps 885 and 890 maychange, and therefore, capacitances C1 950 and C2 960 may also change.

Measurement data regarding V_(in) 1060 (i.e., the output of op-amp 1010)is therefore proportional to the current used to charge the electrodethat is coupled with I_(out) 1040, for example, V_(d) electrode 860associated with movable element 870. Since the voltage on V_(in) 1060 isproportional to the current being provided to V_(d) electrode 860 tomove movable element 870 throughout the entire travel range, thecapacitances may be calculated from data collected from V_(in) 1060.Accordingly, the voltage on V_(in) 1060, provided by op-amp 1010, may beused to generate capacitance data of the IMODs. The capacitance data maybe used to determine positions of movable element 870. As discussedlater herein, an analog-to-digital converter may be used to collect dataon V_(in) 1060. The data may be stored in memory and analyzed by amicrocontroller.

In some implementations, feedback capacitor 1070 may be coupled withI_(out) 1040 and V_(in) 1060. Feedback capacitor 1070 may aid inmaintaining stable operation of the op-amp by reducing oscillations onV_(in) 1060 (i.e., the output of op-amp 1010). In some implementations,the capacitance of feedback capacitor 1070 may be equal to or smallerthan the capacitance of capacitor 1030. For example, the capacitance ofcapacitor 1070 may be between 2.7 picofarads (pF) to 10 pF. In someimplementations, if 25 IMODs are modeled as capacitor 1030, capacitor1070 may have a capacitance of 2.7 pF.

FIG. 11A is an illustration of an example of current vs. voltageassociated with display units, such as IMODs. In FIG. 11A, measurement1110 may be associated with a first IMOD or group of IMODs. Measurement1120 may be associated with a second IMOD or group of IMODs. The x-axismay represent V_(ref) 1050 ramping in voltage, for example, from 2 to 14V. The y-axis may represent the current associated with I_(out) 1040(i.e., the current generated by voltage controlled current source 1020based on the voltage provided by V_(in) 1060).

As previously discussed, deviations from process variations, temperaturegradients, and other effects may cause IMODs or groups of IMODs to havedifferent characteristics, and therefore, different performances.Accordingly, measurement 1110 and measurement 1120 are associated withdifferent curves.

Based on the V_(in) 1060 measurement data, capacitance values may beobtained. FIG. 11B is an illustration of an example of capacitance vs.voltage associated with IMODs. In FIG. 11B, curve 1150 may be associatedwith the first IMOD or group of IMODs associated with measurement 1110.Curve 1160 may be associated with the second IMOD or group of IMODsassociated with measurement 1120. The x-axis may represent V_(ref) 1050ramping in voltage. The y-axis may represent the capacitance associatedwith IMODs as V_(ref) 1050 ramps in voltage. Because the capacitancesare associated with different sizes of air gaps 885 and/or 890, thecapacitance values on the y-axis represent different positions formovable element 870. Accordingly, if the IMODs or groups of IMODsassociated with curves 1150 and 1160 performed the same, the sameapplication of voltages would result in the same capacitance valuesbecause movable element 870 would move to the same expected position. Assuch, curves 1150 and 1160 would be the same. However, in FIG. 11B, thesame application of voltages result in different capacitance values forcurves 1150 and 1160 due to different performance characteristics, aspreviously discussed. Accordingly, curves 1150 and 1160 are different.

For example, applying 8 V to a first IMOD or group of IMODs may providea capacitance value of 1.85e-10 farads (F). A capacitance of 1.85e-10 Fmay be associated with a certain size air gap (i.e., movable element 870has been positioned to a particular location from a starting locationsuch that an air gap of a particular size is also created betweenmovable element 870 and an electrode of the IMOD). However, a secondIMOD or group of IMODs may provide a capacitance value of 1.80e-10 F foran application of 8 V on V_(ref) 1050 with movable element 870 movingfrom the same starting position. That is, for the second IMOD or groupof IMODs, movable element 870 may move to a different position than thefirst IMOD or group of IMODs. Accordingly, when the respective movableelements 870 need to be moved to the same position, an offset (forexample, determined based on the measurements provided by circuit 1000in FIG. 10A) may be provided such that slightly different voltages maybe applied in order to move movable elements 870 to the same position,and therefore, reflect light at the same wavelength.

FIG. 12 is an example of a system block diagram of a systemincorporating the measurement circuit of FIG. 10A. As previouslydiscussed, measurement circuit 1000 may provide measurement dataregarding one or more IMODs in display 30. In some implementations, themeasurement data generated by measurement circuit 1000 may be providedto analog-to-digital converter (ADC) 1210. That is, V_(in) 1060 (i.e.,the output of op-amp 1010) may be an input to ADC 1210.

In an implementation, ADC 1210 may digitize the data and provide it tomicrocontroller 1220, which may store the measurement data in memory1230. In other implementations, ADC 1210 may store the measurement datain memory 1230.

Microcontroller 1220 may analyze the measurement data in memory 1230 anddetermine offsets to be provided to driver circuitry (e.g., row drivercircuit 24 and column driver circuit 26) used to bias V_(bias) electrode855, V_(d) electrode 860, and V_(com) electrode 865. As previouslydiscussed, the offsets may be used to determine proper voltage biases toposition movable element 870 to an expected position.

Microcontroller 1220 may also analyze the measurement data in memory1230, or as the data is received from ADC 1210, and change variousparameters associated with measurement circuit 1000 or display 30. Forexample, microcontroller 1220 may, based on the measurement data, change(e.g., raise or lower) the gain of voltage controlled current source1020 based on a number of display units (e.g., IMODs) being measured, asdiscussed below. Additionally, microcontroller 1220 may change the rampof V_(ref) 1050 by changing the voltage range or the ramp rate. Changingthe ramp rate may also be used to control the gain of voltage controlledcurrent source 1020 because a higher ramp rate allows for a higherresponse. For example, the time V_(ref) 1050 progresses through thevoltage range may change from 2.5 ms to 3.0 ms, or vice versa.Additionally, voltage ranges may be changed. For example, measurementdata may be obtained at different V_(ref) 1050 voltages ranges, such asramping up from 1 V to 15 V, ramping down from 15 V to 1 V, ramping downin negative voltages from −1 V to −15 V, and ramping up in negativevoltages from −15 V to −1 V. Accordingly, a wide variety of measurementsat different ramp rates and/or voltage ranges may be generated bymeasurement circuit 1000.

Microcontroller 1220 may also change the number of IMODs measured at atime. That is, the number of IMODs that are coupled with I_(out) 1040may also be changed by microcontroller 1220. FIG. 13 illustrates anexample of a six-by-six display array 30.

As an example, measurement circuit 1000 may first measure six IMODs in arow at a time. Accordingly, IMOD group 1310 may include six IMODs with aterminal coupled with I_(out) 1040, as in group 1310. In the next row,microcontroller 1220 may configure display array 30 such that only threeIMODs are coupled with I_(out) 1040. Accordingly, groups 1320 and 1330may independently be coupled with I_(out) 1040 and provide separateV_(in) 1060 measurements. Next, group 1340 may be selected, whichincludes twelve IMODs in two separate rows. Groups 1350 and 1360 mayalso be configured by microcontroller 1220.

In some implementations, if the number of IMODs in a group is increased,the ramp rate of V_(ref) 1050 may be lowered so that the output responseof op-amp 1010 may stay approximately similar without changing the gainof voltage controlled current source 1020. For example, the ramp rate ofV_(ref) 1050 may be lowered when microcontroller 1220 configures theselection of IMODs from group 1330 (i.e., three IMODs) to group 1340(i.e., twelve IMODs).

In an implementation, if the number of display units in a group ischanged, the capacitance of capacitor 1070 (e.g., a single capacitor, ora group of capacitors) may also be dynamically changed bymicrocontroller 1220. For example, if the number of display units in thegroup is increased, the capacitance of capacitor 1070 may be increased.If the number of display units in the group is decreased, thecapacitance of capacitor 1070 may be decreased such that the totalcapacitance of capacitor 1070 is less than or equal to the capacitanceassociated with the display units in the group.

The capacitance of capacitor 1070 may be changed through a variety ofmechanisms. For example, a network of capacitors may be coupled inseries and/or parallel with each other through switches. Microcontroller1220 may control the switches and turn particular switches on or offsuch that an equivalent capacitance is provided by multiple capacitors.Other examples include a varactor (e.g., a varicap diode), a MEMS orNEMS-based variable or tuned capacitor, or any other variable capacitoror mechanism to provide variable capacitance.

In another implementation, the number of IMODs in a group may change asmeasurement data is analyzed by microcontroller 1220. For example, if alarge area or number of IMODs are indicated as deviating from anexpected capacitance value, a smaller number of IMODs may be groupedtogether to provide V_(in) 1060 measurements.

In some implementations, microcontroller 1220 may also change theterminal associated with the IMOD or group of IMODs that is coupled withI_(out) 1040 and used to provide V_(in) 1060. For example,microcontroller 1220 may configure an IMOD such that capacitance C1 950between V_(bias) electrode 855 and V_(d) electrode 860 is measured.Microcontroller 1220 may also configure an IMOD such that capacitance C2960 between V_(d) electrode 860 and V_(com) electrode 865 is measured.

FIG. 14 is a flow diagram illustrating a method for measuringcapacitance. In method 1400, at block 1410, a reference voltage providedas an input to an op-amp may be ramped at voltages associated withpositioning movable element 870 throughout its travel range. At block1420, the output of the op-amp may be provided as feedback to a voltagecontrolled current source to generate current according to a gain, aspreviously discussed. Accordingly, the current may be provided to adisplay unit or group of display units (e.g., an IMOD or group ofIMODs), and therefore, a voltage may also be generated. At block 1430,the voltage may be provided to the op-amp. Accordingly, the op-amp mayprovide an output as the differential input voltage of the referencevoltage and the voltage associated with the display unit or group ofdisplay units. The method ends at block 1440.

FIG. 15 is an example of a system block diagram using the measurementcircuit of FIG. 10A, or an implementation similar thereof, to measureleakage. In FIG. 15, interconnect layout 1500 may represent interconnectfor electrodes of a display unit, such as an IMOD. For example, in oneimplementation, the vertical interconnect may be associated with V_(d)electrode 860 and the horizontal interconnect may be associated withV_(bias) electrode 855 and/or V_(com) electrode 865. Accordingly, eachintersection in interconnect layout 1500 may represent an IMOD.

In FIG. 15, interconnect 1510 may be biased, for example, at 0 V.Interconnect 1520 may be coupled with I_(out) 1040 of measurementcircuit 1000 in FIG. 14. The other interconnect in interconnect layout1500 may be biased at the same voltage, for example, 1 V. Additionally,measurement circuit 1000 may be coupled with interconnect 1520 viaswitch 1530. Moreover, V_(ref) 1050 of measurement circuit 1000 may beset to a fixed voltage, such as 1 V, rather than a ramping voltagesource.

If V_(ref) 1050 is set to 1 V, and there is no leakage betweeninterconnect 1510 and 1520, then the output of measurement circuit 1000should be 0 V because I_(out) 1040 should follow 1 V from V_(ref) 1050,and therefore, the output of measurement circuit 1000 would be 0V.However, if there is leakage between interconnect 1520 and interconnect1510, then the voltage may deviate from 0 V because I_(out) 1040 may notfollow V_(ref) 1050. That is, if there is leakage between interconnect1510 biased at 0 V and interconnect 1520 coupled with I_(out) 1040, thenthe voltage on I_(out) 1040 may not be 1 V (i.e., the voltage of V_(ref)1050) because of leakage to interconnect 1510, and therefore, the outputof measurement circuit 1000 may not be 0 V.

In some implementations, multiple groups of display units may bemeasured for leakage, similar to measuring V_(in) 1060 associated withcapacitance of groups of display units, as previously discussed. Forexample, leakage associated with 25 display units at a time may bemeasured. Accordingly, V_(ref) 1050 may be set to 1 V to apply 1 V toV_(d) electrode 860 and the other sides of the display units, such aselectrode 855 and electrode 865 of an IMOD, may be set to 0 V.

In an implementation, measurement circuit 1000 may couple with one ormore vertical interconnects in interconnect layout 1500 via switch 1530.Each horizontal interconnect in interconnect layout 1500 may then bebiased one at a time at another voltage from the rest of interconnectlayout 1500. When all of the horizontal interconnect have been biased atthe other voltage, switch 1530 may be configured to couple measurementcircuit 1000 with another vertical interconnect and the horizontalinterconnects may again be biased at the other voltage one at a time.The process may repeat until leakage associated with each display unitis determined.

FIG. 16 is a flow diagram illustrating a method for measuring leakage.In method 1600, at block 1610, a measurement circuit may be coupled to afirst interconnect in a first group of interconnects. For example, inthe example of FIG. 15, the measurement circuit may be coupled to avertical interconnect associated with an electrode of a display unit. Inblock 1620, a second interconnect from a second group of interconnectsmay be biased to a first voltage. For example, interconnect associatedwith another electrode of display unit than the first interconnect maybe biased to 0 V. At block 1630, the remaining interconnect in the firstand second groups may be biased at a second voltage, such as 1 V, suchthat a leakage current may be generated. In block 1640, a referencevoltage in the measurement circuit may be set to the second voltage. Forexample, V_(ref) 1050 may also be set to 1 V. In block 1650, the voltageof the measurement circuit may be generated. If the voltage is 0 V, thenthere is no leakage between the electrodes associated with the firstinterconnect and the second interconnect. At block 1660, the methodends.

FIGS. 17A and 17B are system block diagrams illustrating a displaydevice 40 that includes a plurality of IMOD display elements. Thedisplay device 40 can be, for example, a smart phone, a cellular ormobile telephone. However, the same components of the display device 40or slight variations thereof are also illustrative of various types ofdisplay devices such as televisions, computers, tablets, e-readers,hand-held devices and portable media devices.

The display device 40 includes a housing 41, a display 30, an antenna43, a speaker 45, an input device 48 and a microphone 46. The housing 41can be formed from any of a variety of manufacturing processes,including injection molding, and vacuum forming. In addition, thehousing 41 may be made from any of a variety of materials, including,but not limited to: plastic, metal, glass, rubber and ceramic, or acombination thereof. The housing 41 can include removable portions (notshown) that may be interchanged with other removable portions ofdifferent color, or containing different logos, pictures, or symbols.

The display 30 may be any of a variety of displays, including abi-stable or analog display, as described herein. The display 30 alsocan be configured to include a flat-panel display, such as plasma, EL,OLED, STN LCD, or TFT LCD, or a non-flat-panel display, such as a CRT orother tube device. In addition, the display 30 can include an IMOD-baseddisplay, as described herein.

The components of the display device 40 are schematically illustrated inFIG. 17A. The display device 40 includes a housing 41 and can includeadditional components at least partially enclosed therein. For example,the display device 40 includes a network interface 27 that includes anantenna 43 which can be coupled to a transceiver 47. The networkinterface 27 may be a source for image data that could be displayed onthe display device 40. Accordingly, the network interface 27 is oneexample of an image source module, but the processor 21 and the inputdevice 48 also may serve as an image source module. The transceiver 47is connected to a processor 21, which is connected to conditioninghardware 52. The conditioning hardware 52 may be configured to conditiona signal (such as filter or otherwise manipulate a signal). Theconditioning hardware 52 can be connected to a speaker 45 and amicrophone 46. The processor 21 also can be connected to an input device48 and a driver controller 29. The driver controller 29 can be coupledto a frame buffer 28, and to an array driver 22, which in turn can becoupled to a display array 30. One or more elements in the displaydevice 40, including elements not specifically depicted in FIG. 17A, canbe configured to function as a memory device and be configured tocommunicate with the processor 21. In some implementations, a powersupply 50 can provide power to substantially all components in theparticular display device 40 design.

The network interface 27 includes the antenna 43 and the transceiver 47so that the display device 40 can communicate with one or more devicesover a network. The network interface 27 also may have some processingcapabilities to relieve, for example, data processing requirements ofthe processor 21. The antenna 43 can transmit and receive signals. Insome implementations, the antenna 43 transmits and receives RF signalsaccording to the IEEE 16.11 standard, including IEEE 16.11(a), (b), or(g), or the IEEE 802.11 standard, including IEEE 802.11a, b, g, n, andfurther implementations thereof. In some other implementations, theantenna 43 transmits and receives RF signals according to the Bluetooth®standard. In the case of a cellular telephone, the antenna 43 can bedesigned to receive code division multiple access (CDMA), frequencydivision multiple access (FDMA), time division multiple access (TDMA),Global System for Mobile communications (GSM), GSM/General Packet RadioService (GPRS), Enhanced Data GSM Environment (EDGE), TerrestrialTrunked Radio (TETRA), Wideband-CDMA (W-CDMA), Evolution Data Optimized(EV-DO), 1xEV-DO, EV-DO Rev A, EV-DO Rev B, High Speed Packet Access(HSPA), High Speed Downlink Packet Access (HSDPA), High Speed UplinkPacket Access (HSUPA), Evolved High Speed Packet Access (HSPA+), LongTerm Evolution (LTE), AMPS, or other known signals that are used tocommunicate within a wireless network, such as a system utilizing 3G, 4Gor 5G technology. The transceiver 47 can pre-process the signalsreceived from the antenna 43 so that they may be received by and furthermanipulated by the processor 21. The transceiver 47 also can processsignals received from the processor 21 so that they may be transmittedfrom the display device 40 via the antenna 43.

In some implementations, the transceiver 47 can be replaced by areceiver. In addition, in some implementations, the network interface 27can be replaced by an image source, which can store or generate imagedata to be sent to the processor 21. The processor 21 can control theoverall operation of the display device 40. The processor 21 receivesdata, such as compressed image data from the network interface 27 or animage source, and processes the data into raw image data or into aformat that can be readily processed into raw image data. The processor21 can send the processed data to the driver controller 29 or to theframe buffer 28 for storage. Raw data typically refers to theinformation that identifies the image characteristics at each locationwithin an image. For example, such image characteristics can includecolor, saturation and gray-scale level.

The processor 21 can include a microcontroller, CPU, or logic unit tocontrol operation of the display device 40. The conditioning hardware 52may include amplifiers and filters for transmitting signals to thespeaker 45, and for receiving signals from the microphone 46. Theconditioning hardware 52 may be discrete components within the displaydevice 40, or may be incorporated within the processor 21 or othercomponents.

The driver controller 29 can take the raw image data generated by theprocessor 21 either directly from the processor 21 or from the framebuffer 28 and can re-format the raw image data appropriately for highspeed transmission to the array driver 22. In some implementations, thedriver controller 29 can re-format the raw image data into a data flowhaving a raster-like format, such that it has a time order suitable forscanning across the display array 30. Then the driver controller 29sends the formatted information to the array driver 22. Although adriver controller 29, such as an LCD controller, is often associatedwith the system processor 21 as a stand-alone Integrated Circuit (IC),such controllers may be implemented in many ways. For example,controllers may be embedded in the processor 21 as hardware, embedded inthe processor 21 as software, or fully integrated in hardware with thearray driver 22.

The array driver 22 can receive the formatted information from thedriver controller 29 and can re-format the video data into a parallelset of waveforms that are applied many times per second to the hundreds,and sometimes thousands (or more), of leads coming from the display'sx-y matrix of display elements.

In some implementations, the driver controller 29, the array driver 22,and the display array 30 are appropriate for any of the types ofdisplays described herein. For example, the driver controller 29 can bea conventional display controller or a bi-stable display controller(such as an IMOD display element controller). Additionally, the arraydriver 22 can be a conventional driver or a bi-stable display driver(such as an IMOD display element driver). Moreover, the display array 30can be a conventional display array or a bi-stable display array (suchas a display including an array of IMOD display elements). In someimplementations, the driver controller 29 can be integrated with thearray driver 22. Such an implementation can be useful in highlyintegrated systems, for example, mobile phones, portable-electronicdevices, watches or small-area displays.

In some implementations, the input device 48 can be configured to allow,for example, a user to control the operation of the display device 40.The input device 48 can include a keypad, such as a QWERTY keyboard or atelephone keypad, a button, a switch, a rocker, a touch-sensitivescreen, a touch-sensitive screen integrated with the display array 30,or a pressure- or heat-sensitive membrane. The microphone 46 can beconfigured as an input device for the display device 40. In someimplementations, voice commands through the microphone 46 can be usedfor controlling operations of the display device 40.

The power supply 50 can include a variety of energy storage devices. Forexample, the power supply 50 can be a rechargeable battery, such as anickel-cadmium battery or a lithium-ion battery. In implementationsusing a rechargeable battery, the rechargeable battery may be chargeableusing power coming from, for example, a wall socket or a photovoltaicdevice or array. Alternatively, the rechargeable battery can bewirelessly chargeable. The power supply 50 also can be a renewableenergy source, a capacitor, or a solar cell, including a plastic solarcell or solar-cell paint. The power supply 50 also can be configured toreceive power from a wall outlet.

In some implementations, control programmability resides in the drivercontroller 29 which can be located in several places in the electronicdisplay system. In some other implementations, control programmabilityresides in the array driver 22. The above-described optimization may beimplemented in any number of hardware and/or software components and invarious configurations.

As used herein, a phrase referring to “at least one of” a list of itemsrefers to any combination of those items, including single members. Asan example, “at least one of: a, b, or c” is intended to cover: a, b, c,a-b, a-c, b-c, and a-b-c.

The various illustrative logics, logical blocks, modules, circuits andalgorithm steps described in connection with the implementationsdisclosed herein may be implemented as electronic hardware, computersoftware, or combinations of both. The interchangeability of hardwareand software has been described generally, in terms of functionality,and illustrated in the various illustrative components, blocks, modules,circuits and steps described above. Whether such functionality isimplemented in hardware or software depends upon the particularapplication and design constraints imposed on the overall system.

The hardware and data processing apparatus used to implement the variousillustrative logics, logical blocks, modules and circuits described inconnection with the aspects disclosed herein may be implemented orperformed with a general purpose single- or multi-chip processor, adigital signal processor (DSP), an application specific integratedcircuit (ASIC), a field programmable gate array (FPGA) or otherprogrammable logic device, discrete gate or transistor logic, discretehardware components, or any combination thereof designed to perform thefunctions described herein. A general purpose processor may be amicroprocessor, or, any conventional processor, controller,microcontroller, or state machine. A processor also may be implementedas a combination of computing devices, such as a combination of a DSPand a microprocessor, a plurality of microprocessors, one or moremicroprocessors in conjunction with a DSP core, or any other suchconfiguration. In some implementations, particular steps and methods maybe performed by circuitry that is specific to a given function.

In one or more aspects, the functions described may be implemented inhardware, digital electronic circuitry, computer software, firmware,including the structures disclosed in this specification and theirstructural equivalents thereof, or in any combination thereof.Implementations of the subject matter described in this specificationalso can be implemented as one or more computer programs, i.e., one ormore modules of computer program instructions, encoded on a computerstorage media for execution by, or to control the operation of, dataprocessing apparatus.

Various modifications to the implementations described in thisdisclosure may be readily apparent to those skilled in the art, and thegeneric principles defined herein may be applied to otherimplementations without departing from the spirit or scope of thisdisclosure. Thus, the claims are not intended to be limited to theimplementations shown herein, but are to be accorded the widest scopeconsistent with this disclosure, the principles and the novel featuresdisclosed herein. Additionally, a person having ordinary skill in theart will readily appreciate, the terms “upper” and “lower” are sometimesused for ease of describing the figures, and indicate relative positionscorresponding to the orientation of the figure on a properly orientedpage, and may not reflect the proper orientation of, e.g., an IMODdisplay element as implemented.

Certain features that are described in this specification in the contextof separate implementations also can be implemented in combination in asingle implementation. Conversely, various features that are describedin the context of a single implementation also can be implemented inmultiple implementations separately or in any suitable subcombination.Moreover, although features may be described above as acting in certaincombinations and even initially claimed as such, one or more featuresfrom a claimed combination can in some cases be excised from thecombination, and the claimed combination may be directed to asubcombination or variation of a subcombination.

Similarly, while operations are depicted in the drawings in a particularorder, a person having ordinary skill in the art will readily recognizethat such operations need not be performed in the particular order shownor in sequential order, or that all illustrated operations be performed,to achieve desirable results. Further, the drawings may schematicallydepict one more example processes in the form of a flow diagram.However, other operations that are not depicted can be incorporated inthe example processes that are schematically illustrated. For example,one or more additional operations can be performed before, after,simultaneously, or between any of the illustrated operations. In certaincircumstances, multitasking and parallel processing may be advantageous.Moreover, the separation of various system components in theimplementations described above should not be understood as requiringsuch separation in all implementations, and it should be understood thatthe described program components and systems can generally be integratedtogether in a single software product or packaged into multiple softwareproducts. Additionally, other implementations are within the scope ofthe following claims. In some cases, the actions recited in the claimscan be performed in a different order and still achieve desirableresults.

The circuits and techniques disclosed herein utilize examples of values(e.g., voltages, capacitances, dimensions, etc.) that are provided forillustration purposes only. Other implementations may involve differentvalues.

What is claimed is:
 1. A circuit comprising: an amplifier having a firstinput, a second input, and an output, the first input of the amplifiercoupled with a voltage reference source; a current source having aninput and an output, the input of the current source coupled with theoutput of the amplifier, the output of the current source coupled withthe second input of the amplifier, the current source being voltagecontrolled; and one or more display units having a first terminalcoupled with the second input of the amplifier and with the output ofthe current source, wherein the current source is configured to providea current based on a voltage associated with the output of theamplifier, the current increasing until a voltage associated with thefirst terminal of the one or more display units equals a voltageassociated with the voltage reference source, wherein the first terminalof the one or more display units is associated with a movable element,and the voltage reference source is configured to ramp through a voltagerange associated with a travel range of the movable element.
 2. Thecircuit of claim 1, further comprising: a feedback capacitor having afirst terminal and a second terminal, the first terminal of the feedbackcapacitor coupled with the output of the current source, the secondterminal of the feedback capacitor coupled with the output of theamplifier.
 3. The circuit of claim 2, wherein a capacitance of thefeedback capacitor is less than or equal to a capacitance of the one ormore display units.
 4. The circuit of claim 1 further comprising: ananalog-to-digital converter having an input coupled with the output ofthe amplifier.
 5. The circuit of claim 1, wherein the one or moredisplay units have a second terminal set to a first fixed voltage. 6.The circuit of claim 5, wherein the one or more display units have athird terminal set to the first fixed voltage.
 7. The circuit of claim5, wherein the one or more display units have a third terminal set to asecond fixed voltage.
 8. The circuit of claim 1, wherein the travelrange of the movable element is between a second terminal and a thirdterminal of the display unit.
 9. The circuit of claim 1, wherein thecurrent source has a linear gain.
 10. The circuit of claim 1, wherein amovable element associated with the first terminal of the one or moredisplay units is configured to move to positions between a secondterminal and a third terminal of the one or more display units until thevoltage associated with the first terminal of the display units equalsthe voltage associated with the voltage reference source.
 11. Thecircuit of claim 1, further comprising: a display including a pluralityof display units; a processor that is configured to communicate with thedisplay, the processor being configured to process image data; and amemory device that is configured to communicate with the processor. 12.The circuit of claim 11, further comprising: a driver circuit configuredto send at least one signal to the display; and a controller configuredto send at least a portion of the image data to the driver circuit. 13.The circuit of claim 11, further comprising: an image source moduleconfigured to send the image data to the processor, wherein the imagesource module comprises at least one of a receiver, transceiver, andtransmitter.
 14. The circuit of claim 11, further comprising: an inputdevice configured to receive input data and to communicate the inputdata to the processor.
 15. A system comprising: a measurement circuitincluding: an amplifier having a first input, a second input, and anoutput, the first input of the amplifier coupled with a voltagereference source, and a current source having an input and an output,the input of the current source coupled with the output of theamplifier, the output of the current source coupled with the secondinput of the amplifier, the current source being voltage controlled; oneor more display units having a first terminal coupled with the secondinput of the amplifier and with the output of the current source,wherein the current source is configured to provide a current based on avoltage associated with the output of the amplifier, the currentincreasing until a voltage associated with the first terminal of the oneor more display units equals a voltage associated with the voltagereference source, wherein the first terminal of the one or more displayunits is associated with a movable element, and the voltage referencesource is configured to ramp through a voltage range associated with atravel range of the movable element; an analog-to-digital converter(ADC) having an input coupled with the output of the amplifier, and anoutput to provide measurement data; and a memory configured to store themeasurement data.
 16. The system of claim 15, further comprising: amicrocontroller configured to analyze the measurement data.
 17. A methodfor determining capacitance of a group of one or more display units, themethod comprising: ramping a reference voltage associated with a firstinput of an amplifier, the amplifier having a second input, and anoutput; generating a current from a current source having an input andan output, the input of the current source coupled with the output ofthe amplifier, the output of the current source coupled with the secondinput of the amplifier, the current source being voltage controlled; andproviding a voltage associated with a first terminal of the group of oneor more display units, the first terminal coupled with the second inputof the amplifier and with the output of the current source, wherein thecurrent source provides a current based on a voltage associated with theoutput of the amplifier, the current increasing until the voltageassociated with the first terminal of the one or more display unitsequals a voltage associated with the voltage reference source, whereinthe first terminal of the group of one or more display units isassociated with a movable element, and the reference voltage is rampedthrough a voltage range associated with a travel range of the movableelement.
 18. The method of claim 17, the method further comprising:providing a feedback capacitor, the feedback capacitor having a firstterminal coupled with the output of the current source and a secondterminal coupled with the output of the amplifier.
 19. The method ofclaim 18, the method further comprising: changing a capacitance of thefeedback capacitor based on a number of display units in the group ofthe one or more display units.